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ARNABOLDI-THESIS-2017.pdf (1.38 MB)

XeMPUPiL: Towards a Performance-aware Power Capping Orchestrator for the Xen Hypervisor

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posted on 2017-11-01, 00:00 authored by Marco Arnaboldi
In the era of Cloud Computing, services and computational power are provided in an as a Service (aaS) fashion, reducing the need of buying, building and maintaining proprietary systems. In the last few years, many services moved from being proprietary to the as a Service paradigm: this, together with virtualization techniques, allows multiple applications to easily run on the same machine. However, the burden of costs optimization is left to the Cloud Provider, that still faces the problem of consolidating multiple workloads on the same infrastructure. As power consumption remains one of the most impacting costs of any digital system, several approaches have been explored in literature to cope with power caps, trying to maximize the performance of the hosted applications. These approaches were usually classified in two macro families, the software and hardware techniques. The former family is typically adopted when the goal consists in minimizing the power consumption, while providing the best possible performance for the running workloads. This approaches are characterized by obtaining high efficiency, but lacks in timeliness. Instead, the latter family is exploited when there are strict constraints regarding the power budget and the main goal consists in respecting them, while trying to maximize the performance of the running applications. In this case, the main characteristic consists in respecting the concept of timeliness, totally neglecting the concept of efficiency. In this thesis, we present results and opportunities obtained towards a performance- aware power capping orchestrator for the Xen hypervisor, that exploit a novel emerging family introduced in the literature: the hybrid approach. This fresh set of techniques aims to adopt synergically and concurrently both hardware and software approaches in order to achieve at the same time the concept of efficiency and timeliness, masking the weak spots of the two common approaches when adopter alone. The proposed solution, called XeMPUPiL, uses the Intel RAPL hardware interface to set a strict limit on the processor’s power consumption, while a software-level ODA control loop performs an exploration of the available resource allocations to find the most power efficient one for the running workload. We show how XeMPUPiL is able to achieve higher performance under different power caps for almost all the different classes of benchmarks analyzed (e.g., CPU-, memory- and IO-bound).

History

Advisor

Gmytrasiewicz, Piotr J.

Chair

Gmytrasiewicz, Piotr J.

Department

Computer Science

Degree Grantor

University of Illinois at Chicago

Degree Level

  • Masters

Committee Member

Rao, Wenjing Santambrogio, Marco Domenico

Submitted date

August 2017

Issue date

2017-08-16

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