Design Flow to Support Dynamic Partial Reconfiguration on Maxeler Architectures

This work addresses the Maxeler Technologies Ltd. platforms, and the principal goal of this work is to design a new methodology to support Partial Reconfiguration in the Maxeler design flow. The concept of Partial Reconfiguration (PR) enhances the flexibility and the possibilities offered by FPGAs: with PR it is possible to modify the behavior of a determined portion of the device while the rest of the board keeps running.