Energy- and Reliability-Aware Design of High-Speed Global On-Chip Interconnects.

thesis

posted on 2014-12-04, 00:00 authored by Md Sajjad. Rahaman

Energy- and Reliability-Aware Design of High-Speed Global On-Chip Interconnects.

History

Degree Grantor

University of Illinois at Chicago.

Degree Level

Doctoral

Language

es

Issue date

2014-12-04

File(s) available to UIC only. Log in with UIC Net ID to access:

https://uic.figshare.com/account/projects/71123/articles/11086490

Usage metrics

Categories

No categories selected

Keywords

Engineering, Computer.Engineering, Electronics and Electrical.

Licence

Exports