Improving Energy Efficiency and Lifetime of Emerging Memory Systems

DRAM can no longer satisfy the memory capacity demands of the modern-day applications due to its scalability limit and considerable amount of static and refresh power consumption. Non-Volatile Memory (NVM) technologies such as Phase Change Memory (PCM) have recently emerged as promising alternatives to DRAM. Compared to DRAM, NVMs have better scalability, higher density and zero standby power. However, NVMs generally suffer from higher access latency and energy (especially for the write operations) and limited write endurance. To benefit from the large capacity of NVM and the lower access latency and energy of DRAM, hybrid DRAM/NVM main memories, which incorporate both DRAM and NVM, have been proposed. In this thesis, we present novel schemes for improving the energy efficiency of hybrid main memories or alleviating the write-related overheads of PCM-based memories. We first focus on reducing DRAM refresh and background power in a hybrid DRAM/NVM main memory by proposing two schemes called Refree and NEMO. Then, we present WALL, a scheme that improves the energy efficiency and lifetime of a PCM-based main memory by reducing the number of writebacks from the last level cache to PCM. Finally, we present a scheme called DynaSwap to efficiently utilize DRAM space in a flat address space hybrid main memory and improve its performance and energy efficiency. Our evaluation results have shown that our schemes can effectively improve memory system energy efficiency and lifetime with negligible impact on performance.