SHINDE-THESIS-2020.pdf (7 MB)
Nimble: Scalable Rate-Limiting on Today's Programmable Switches
thesis
posted on 2020-08-01, 00:00 authored by Komal M ShindeThe aim of this thesis is to build a scalable rate limiters in programmable switches through packet dropping as well as ECN congestion control marking when tenant flow sends more than there allocated bandwidth without requiring any queuing or scheduling resources. Nimble approximates the behavior of virtual queues with a fewer requirement of resources and utilizes counters which are dedicated SRAM by PISA switches for network monitoring purpose to enforce policies by packet dropping and congestion control. Compared to a virtual queue, Nimble has achieved low resource overhead.
Nimble is not only scalable but also achieves high throughput and low latency with no memory overhead. There are two dynamic rate-limiting approaches described in the implementation of Nimble, namely, meter-based rate limiter and logical queue-based rate limiter. They are evaluated on a programmable switch in terms of performance and bandwidth utilization. The key takeaway about Nimble is that it uses counters/registers from the match-action pipeline of a PISA switch to implement leaky bucket for rate limiting.
History
Advisor
Stephens, BrentChair
Stephens, BrentDepartment
Electrical and Computer EngineeringDegree Grantor
University of Illinois at ChicagoDegree Level
- Masters
Degree name
MS, Master of ScienceCommittee Member
Vamanan, Balajee Smida, BesmaSubmitted date
August 2020Thesis type
application/pdfLanguage
- en
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