Power and Energy Efficient Error Detection Techniques
thesisposted on 28.06.2013, 00:00 by Yu Liu
Over the past decades significant technological progress has been made in Very Deep Sub-Micron and nanometer technology domains. However, the performance improvement due to shrinking size of transistors has come at the cost of decreased reliability. Our research mainly studies power and energy efficient error detection techniques at circuit and system levels. The security concern of the scan-based Design-for-Test is also studied.