High-Frequency Link Power Electronics Interface for Discrete Power and Data Transfer

HFDPS for suitable applications have demonstrated a compact solution for the overall power system while ensuring enhanced system efficiency and reliability. Moreover, adding a communication link for information exchange with limited overhead cost has always been of perpetual interest. However, designing a powerline communication (PLC) network for simultaneous HF power and data transfer for an HFDPS poses various challenges. Firstly, a complex high-order analog filtering circuit is required for coupling/decoupling the power and data signals. Secondly, the use of PLC based technique results in a spectral overlap between the HF power and data signals, which following Shannon’s theorem, reduces the channel capacity for data transmission. In lieu of the above discussion, in this research, a new scheme enabling discrete HF power and data transfer over an HF channel in an HFDPS is outlined and is termed as “Sequential co-transfer scheme.” The proposed scheme is in contrast to conventional PLC, where the power and data co- transmission is simultaneous. Sequential co-transfer avoids data corruption by temporally distributing HF power and data signals over an HF channel and limiting their overlap. In this research, a communication data-transfer architecture mechanism required to realize the sequential co-transfer approach has been outlined. Simple transmitter and receiver circuits, synthesized without the use of any analog-filtering circuitry, are designed, and an asynchronous serial-communication-interface (SCI) protocol is implemented. The sequential HF power and data co-transfer is experimentally achieved and validated on a single-input-single-output (SISO) and a Single-input-multi-output (SIMO) power electronics system. Various applications encompassing packetized power delivery empowered by the sequential co-transfer scheme are envisioned and experimentally verified. Additionally, an in-depth analysis of GaN-based power electronics system required for creating the HF power signals is undertaken, and specific design guidelines for reducing HF noise in the circuit are discussed.